Digital Core Design

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D8255

Programmable Peripheral Interface

    The D8255 is a programmable I/O device, designed to be used with all Intel CPUs. What's significant, it also supports most other microprocessors. Our onnovative IP core provides 24 I/O pins, which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation:

           • Mode 0 - Basic Input/Output. This functional configuration provides simple input and output operations for each of the three ports. No „handshaking'' is required, data is simply written to or read from a specified port. Mode 0 Basic Functional Definitions:
              ◦ Two 8-bit ports and two 4-bit ports
              ◦ Any port can be input or output
              ◦ 16 different Input/Output configurations are possible in this Mode.
           • MODE 1 - Strobed Input/Output. This functional configuration provides means for transferring I/O data to or from a specified port in conjunction with strobes or „handshaking'' signals. In the mode 1, Port A and Port B use the lines on Port C, to generate or accept these „handshaking'' signals. Mode 1 Basic functional Definitions:
              ◦ Two Groups (Group A and Group B).
              ◦ Each group contains one 8-bit data port and one 4-bit control/data port.
              ◦ The 8-bit data port can be either input or out-put Both inputs and outputs are latched.
              ◦ The 4-bit port is used for control and status of the 8-bit data port.
           • MODE 2 - Strobed Bidirectional Bus I/O. This functional configuration provides means for communicating with a peripheral device or structure on a single 8-bit bus, both for transmitting and receiving data (bidirectional bus I/O). „Handshaking'' signals are provided to maintain proper bus flow discipline in a similar manner to the MODE 1. Interrupt generation and enable/disable functions are also available. MODE 2 Basic Functional Definitions:
              ◦ Used in Group A only.
              ◦ One 8-bit, bi-directional bus port (Port A) and a 5-bit control port (Port C).
               ◦The 5-bit control port (Port C) is used for control and status for the 8-bit, bi-directional bus port (Port A).
     

    The functional configuration of the D8255 is programmed by the system software, so that normally no external logic is needed to interface peripheral devices or structures. The control word register can be both written and read, as it has been shown in the address decode table (please, see the pin descriptions).


      Performance

      Each core has been tested in a variety of FPGA and ASIC technologies. Its implementation results are summarized below.

      Implementation Speed
      grade
      Utilized Area
      [Slices]
      Frequency
      [MHz]
      SPARTAN-IIE -7 68 203
      SPARTAN-III -5 66 212
      SPARTAN-IIIE -4 66 166
      VIRTEX-E -8 74 200
      VIRTEX-II -6 70 325
      VIRTEX-II pro -7 66 379
      VIRTEX-IV -12 69 339
      VIRTEX-V -12 67 330

       


      Key Features

      • Compatible with industry standard 8255
      • 24 I/O lines individually programmed
        in 2 groups of 12:
        • Group A - Port A and upper half of Port C
        • Group B – Port B and lower half of Port C
      • 3 major modes of operation
        • Mode 0 – Basic input/output
        • Mode 1 – Strobed Input/output
        • Mode 2 – Bi-directional Bus
      • Control Word Read-Back Capability
      • Direct Bit Set/Reset Capability
      • Interrupt control functions
      • No internal three states busses
      • Fully synthesizable, technology independent source code.

      Applications

      • Embedded microprocessor boards
      • Interface to the printer
      • I/O component to interface peripheral
      • Equipment to the microcomputer system bus

      Design Features

      • One global system clock
      • Synchronous reset
      • All asynchronous input signals are synchronized before internal use
      • All latches implemented in original 8255 devices are replaced by equivalent flip-flop registers,
        with the same functionality.

      Symbol

       clk
       rst
       portci (3:0)
      portco (3:0) 
       portai (7:0)
      portao (7:0) 
       portci (3:0)
      portco (3:0) 
       portbi (7:0)
      portbo (7:0) 
       a (1:0)
       datai (7:0)
       cs
       we
       rd
      datao (7:0) 

      Pins description

      PinTypeDescription
      clkinputGlobal clock
      rstinputGlobal reset
      portci (3:0)inputPort C upper part input lines
      portai (7:0)inputPort A input lines
      portci (3:0)inputPort C lower part input lines
      portbi (7:0)inputPort B input lines
      a (1:0)inputAddress lines
      datai (7:0)inputData bus input
      csinputChip select
      weinputWrite enable
      rdinputRead line
      portco (3:0)outputPort C upper part output lines
      portao (7:0)outputPort A output lines
      portco (3:0)outputPort C lower part output lines
      portbo (7:0)outputPort B output lines
      datao (7:0)outputData bus output

      Block Diagram

      Port C upper, Group APorts A, B, and C - The D8255 contains three 8-bit ports. All off them can be configured in a wide variety of functional characteristics by the system software. Each of them has its own special features or \"personality\", to further enhance the power and flexibility of the D8255.

      Port C - One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input). This port can be divided into two 4-bit ports, under the mode control. Each 4-bit port contains a 4-bit latch and it can be used for the control signal outputs and status signal inputs, in conjunction with ports A and B. Only „pull-up\"\" bus holds devices, that are present on Port C.
      portci (3:0)
      portco (3:0)
      Group A ControlGroup A Control - The functional configuration of each port is programmed by the system software. In essence, the CPU outputs a control word to the D8255. The control word contains information, such as mode, bit set, bit reset etc., that initializes the functional configuration of the D8255. Each of the Control block accepts commands from the Read/Write Control Logic, receives control words from the internal data bus and issues the proper commands to its associated ports.

      Group A - Port A and upper half of Port C

      The control word register can be both written and read. Figure shows the control word format, both for Read and Write operations. When the control word is read, bit D7 will always be a logic 1, as this implies control word mode information.
      Port A Group APorts A, B, and C - The D8255 contains three 8-bit ports. All can be configured in a wide variety of functional characteristics by the system software but each has its own special features or personality to further enhance the power and flexibility of the D8255.

      Port A - One 8-bit data output latch/buffer and one 8-bit input latch buffer. Both pull-up and pulldown bus hold devices are present on Port A.
      portai (7:0)
      portao (7:0)
      Port C Lower Group BPorts A, B, and C - The D8255 contains three 8-bit ports. All can be configured in a wide variety of functional characteristics, by the system software but each has its own special features or personality to further enhance the power and flexibility of the D8255.

      Port C - One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input). This port can be divided into two 4-bit ports under the mode control. Each 4-bit port contains a 4-bit latch and it can be used for the control signal outputs and status signal inputs, in conjunction with ports A and B. Only pull-up bus hold devices are present on Port C.
      portci (3:0)
      portco (3:0)
      Group B ControlGroup B Control - The functional configuration of each port is programmed by the system software. In essence, the CPU outputs a control word to the D8255. The control word contains information such as mode, bit set, bit reset, etc., that initializes the functional configuration of the D8255. Each of the Control block accepts commands from the Read/Write Control Logic, receives control words from the internal data bus and issues the proper commands to its associated ports.

      Group B - Port B and lower half of Port C

      The control word register both can be written and read. Figure below shows the control word format both for Read and Write operations. When the control word is read, bit D7 will always be a logic 1, as this implies control word mode information.
      Port B Group BPorts A, B, and C - The D8255 contains three 8-bit ports. All can be configured in a wide variety of functional characteristics by the system software but each has its own special features or personality to further enhance the power and flexibility of the D8255.

      Port B - One 8-bit data input/output latch/buffer. Only pull-up bus holds devices that are present on Port B.
      portbi (7:0)
      portbo (7:0)
      Data Bus BufferData Bus Buffer– The Data Bus Buffer is used to interface the D8255 to the system data bus. Data is transmitted or received by the buffer upon execution of input or output instructions by the CPU. Control words and status information are also transferred through the data bus buffer.

      Read/Write and Control Logic - The control logic block manages all of the internal and external transfers, both Data and Control or Status words. It accepts inputs from the CPU Address and Control busses. This block issues also commands to both of the Control Groups A and B.
      a (1:0)
      datai (7:0)
      datao (7:0)
      cs
      we
      rd
      clk
      rst

      Units

      Port C upper, Group A
      Ports A, B, and C - The D8255 contains three 8-bit ports. All off them can be configured in a wide variety of functional characteristics by the system software. Each of them has its own special features or \"personality\", to further enhance the power and flexibility of the D8255.

      Port C - One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input). This port can be divided into two 4-bit ports, under the mode control. Each 4-bit port contains a 4-bit latch and it can be used for the control signal outputs and status signal inputs, in conjunction with ports A and B. Only „pull-up\"\" bus holds devices, that are present on Port C.
      Group A Control
      Group A Control - The functional configuration of each port is programmed by the system software. In essence, the CPU outputs a control word to the D8255. The control word contains information, such as mode, bit set, bit reset etc., that initializes the functional configuration of the D8255. Each of the Control block accepts commands from the Read/Write Control Logic, receives control words from the internal data bus and issues the proper commands to its associated ports.

      Group A - Port A and upper half of Port C

      The control word register can be both written and read. Figure shows the control word format, both for Read and Write operations. When the control word is read, bit D7 will always be a logic 1, as this implies control word mode information.
      Port A Group A
      Ports A, B, and C - The D8255 contains three 8-bit ports. All can be configured in a wide variety of functional characteristics by the system software but each has its own special features or personality to further enhance the power and flexibility of the D8255.

      Port A - One 8-bit data output latch/buffer and one 8-bit input latch buffer. Both pull-up and pulldown bus hold devices are present on Port A.

      Port C Lower Group B
      Ports A, B, and C - The D8255 contains three 8-bit ports. All can be configured in a wide variety of functional characteristics, by the system software but each has its own special features or personality to further enhance the power and flexibility of the D8255.

      Port C - One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input). This port can be divided into two 4-bit ports under the mode control. Each 4-bit port contains a 4-bit latch and it can be used for the control signal outputs and status signal inputs, in conjunction with ports A and B. Only pull-up bus hold devices are present on Port C.
      Group B Control
      Group B Control - The functional configuration of each port is programmed by the system software. In essence, the CPU outputs a control word to the D8255. The control word contains information such as mode, bit set, bit reset, etc., that initializes the functional configuration of the D8255. Each of the Control block accepts commands from the Read/Write Control Logic, receives control words from the internal data bus and issues the proper commands to its associated ports.

      Group B - Port B and lower half of Port C

      The control word register both can be written and read. Figure below shows the control word format both for Read and Write operations. When the control word is read, bit D7 will always be a logic 1, as this implies control word mode information.
      Port B Group B
      Ports A, B, and C - The D8255 contains three 8-bit ports. All can be configured in a wide variety of functional characteristics by the system software but each has its own special features or personality to further enhance the power and flexibility of the D8255.

      Port B - One 8-bit data input/output latch/buffer. Only pull-up bus holds devices that are present on Port B.

      Data Bus Buffer
      Data Bus Buffer– The Data Bus Buffer is used to interface the D8255 to the system data bus. Data is transmitted or received by the buffer upon execution of input or output instructions by the CPU. Control words and status information are also transferred through the data bus buffer.

      Read/Write and Control Logic - The control logic block manages all of the internal and external transfers, both Data and Control or Status words. It accepts inputs from the CPU Address and Control busses. This block issues also commands to both of the Control Groups A and B.